cpu-architecture
Build a CPU from Scratch in a Simulator
TL;DR: A working CPU is just five subsystems wired together — a register file, an ALU, a tri-state data bus, a RAM module, and a control unit that orchestrates them...
Tag
cpu-architecture
A collection of 13 posts
cpu-architecture
CPU Flags Register: Carry, Zero, Overflow, Sign
TL;DR: A CPU flags register stores four single-bit results from the most recent ALU operation: Zero (Z) when the result is zero, Carry (C) on unsigned overflow, Negative/Sign (N) equal...
demultiplexer
Demultiplexer Tutorial: 1-to-4 and 1-to-8 (DEMUX)
TL;DR: A demultiplexer (DEMUX) is a combinational circuit that takes one data input and routes it to one of output lines, with the destination chosen by an n-bit select code....
cpu-architecture
Endianness: Big vs Little (with Bus Diagrams)
TL;DR: Endianness is the convention for how a multi-byte value is laid out in memory. Big-endian stores the most-significant byte at the lowest address (network protocols, PowerPC); little-endian stores the...
cpu-architecture
How a Microprocessor Works: Fetch-Decode-Execute Deep Dive
TL;DR: A microprocessor repeats one loop forever: fetch the next instruction from memory using the program counter, decode it into control signals, then execute it on the ALU and registers....
alu
How an ALU Works: Arithmetic Logic Unit from Gates
TL;DR: An Arithmetic Logic Unit (ALU) is a combinational circuit inside a CPU that performs arithmetic operations (addition, subtraction) and bitwise logic operations (AND, OR, XOR, NOT, shifts) on two...
cpu-architecture
Instruction Register and the Decode Stage
TL;DR: The instruction register (IR) holds the binary instruction word fetched from memory. The decode stage splits that word into fields — opcode, register addresses, immediate — and feeds each...
cpu-architecture
Program Counter Explained: The CPU's Bookmark
TL;DR: The program counter (PC) is the register that holds the memory address of the next instruction a CPU will fetch. It increments automatically after every fetch, but branch and...
memory
RAM vs ROM: The Essential Difference (with Circuits)
TL;DR: RAM is volatile read-write memory used as the CPU's working scratchpad; ROM is non-volatile read-mostly memory used to hold firmware and constants. Both are arrays of single-bit cells selected...
tri-state-buffer
Tri-State Buffers and Bus Arbitration Explained
TL;DR: A tri-state buffer is a logic gate with three possible outputs — 0, 1, and high-impedance (Hi-Z). The Hi-Z state effectively disconnects the buffer from the wire, allowing multiple...
binary-arithmetic
Two's Complement: Signed Binary Arithmetic Explained
TL;DR: Two's complement is the encoding every modern CPU uses for signed integers. The most significant bit carries weight instead of ; the rest of the bits keep their normal...
cpu-architecture
Visualizing the Fetch-Decode-Execute Cycle in a Simulator
TL;DR: Every CPU executes instructions through a three-phase loop: fetch (read instruction from memory using the Program Counter), decode (the Control Unit interprets the opcode), and execute (the ALU and...