PREVIEW
Fig. 1 — 4-Bit PIPO Register INTERACTIVE

배울 내용

  • Store multiple bits on a single clock edge
  • Distinguish a register from a latch
  • See parallel load and parallel output

작동 원리

Four D flip-flops share one clock. On the clock edge each flip-flop captures its data input, so all four bits load in parallel and are held in parallel - a parallel-in, parallel-out register.

사용된 구성 요소

실제 응용 사례

CPU registers, pipeline stages, and temporary data storage between logic blocks.