Mealy vs Moore State Machines: With Examples
TL;DR: A Mealy machine's outputs depend on both the current state and the current inputs; a Moore machine's outputs depend only on the current state. Mealy machines tend to use...
TL;DR: A Mealy machine's outputs depend on both the current state and the current inputs; a Moore machine's outputs depend only on the current state. Mealy machines tend to use...
TL;DR: A parity bit is one extra bit appended to a binary word so that the total number of 1s is even (even parity) or odd (odd parity). A chain...
TL;DR: A priority encoder is a combinational circuit that takes N input lines and outputs a -bit binary code identifying the highest-priority active input. Unlike a plain encoder (which assumes...
TL;DR: The program counter (PC) is the register that holds the memory address of the next instruction a CPU will fetch. It increments automatically after every fetch, but branch and...
TL;DR: RAM is volatile read-write memory used as the CPU's working scratchpad; ROM is non-volatile read-mostly memory used to hold firmware and constants. Both are arrays of single-bit cells selected...
TL;DR: SimCast lessons are step-by-step animated circuit tutorials inside DigiSim. Each step adds components, draws wires, and updates values while a narrator explains in your chosen language. You pause anywhere,...
TL;DR: A shift register is a chain of flip-flops with a shared clock. Pick where the data enters and exits — serially or in parallel — and you get four...
TL;DR: A static hazard is a momentary glitch on an output that should have stayed constant; a dynamic hazard is multiple transitions on an output that should have changed exactly...
TL;DR: A tri-state buffer is a logic gate with three possible outputs — 0, 1, and high-impedance (Hi-Z). The Hi-Z state effectively disconnects the buffer from the wire, allowing multiple...
TL;DR: Two's complement is the encoding every modern CPU uses for signed integers. The most significant bit carries weight instead of ; the rest of the bits keep their normal...
TL;DR: Drop an OSCILLOSCOPE (2-channel) or OSCILLOSCOPE8CH (8-channel) onto the canvas, wire each channel to the signal you care about, and run the simulation. The waveform window scrolls in real...
TL;DR: AND, OR, and NOT are the three fundamental logic gates. AND outputs 1 only when all inputs are 1; OR outputs 1 when any input is 1; NOT inverts...