timing
Clock Skew and Its Effect on Timing
TL;DR: Clock skew is the difference between when a clock edge arrives at one flip-flop and when it arrives at the next. Positive skew (the receive flip-flop sees the edge...
Tag
sequential-logic
A collection of 11 posts
state-machines
Mealy vs Moore State Machines: With Examples
TL;DR: A Mealy machine's outputs depend on both the current state and the current inputs; a Moore machine's outputs depend only on the current state. Mealy machines tend to use...
sequential-logic
SISO, SIPO, PISO, PIPO: Shift Register Modes
TL;DR: A shift register is a chain of flip-flops with a shared clock. Pick where the data enters and exits — serially or in parallel — and you get four...
sequential-logic
Counters and State Machines: Controlling Digital Sequences
TL;DR: A counter is a sequential circuit that steps through a fixed binary sequence on each clock edge. A finite state machine (FSM) generalizes this with conditional transitions driven by...
sequential-logic
Mastering Sequential Logic: The D Latch Explained and Simulated
TL;DR: A D latch stores one bit. It has two inputs (Data and Enable) and follows the characteristic equation . When Enable is HIGH, the latch is transparent — Q...
sequential-logic
SR vs. JK Flip-Flops: The Basics of Sequential Logic
TL;DR: The SR latch is the simplest memory element but has a forbidden state when both inputs are 1. The JK flip-flop fixes this by redefining J=K=1 as a toggle,...
d-flip-flop
The D Flip-Flop: Edge-Triggered Memory in Digital Design
TL;DR: A D flip-flop captures whatever is on its data (D) input at the moment of an active clock edge and holds that value until the next active edge. Its...
jk-flip-flop
The JK Flip-Flop: Universal Sequential Building Block
TL;DR: The JK flip-flop is the most versatile 1-bit memory element. Its J and K inputs at the active clock edge select one of four modes — hold (00), reset...
johnson-counter
The Johnson Counter: A Twisted-Ring Counter Explained
TL;DR: A Johnson counter is a synchronous shift register where the inverted output of the last stage feeds back to the first stage. With flip-flops it produces unique states, and...
t-flip-flop
The T Flip-Flop: A Toggle Cell for Counters and Timers
TL;DR: A T flip-flop toggles its stored bit on every active clock edge when T=1 and holds it when T=0. Its characteristic equation is . Tied permanently to T=1, it...
sr-latch
The SR Latch: The Simplest Digital Memory Element
TL;DR: The SR (Set-Reset) latch is a bistable circuit built from two cross-coupled NOR gates (active-high) or two cross-coupled NAND gates (active-low). It supports Set, Reset, and Hold operations but...