PREVIEW

A simple but powerful introduction to combinational logic: a vault door that only unlocks when three independent security conditions are all satisfied at the same time. The circuit boils down to a single 3-input AND gate, which is exactly how real keycard, badge, and biometric systems combine multiple checks before granting access.

学べること

  • Read and write truth tables for AND-based circuits with two and three inputs.
  • Translate a real-world security policy ("all three checks must pass") into a Boolean expression.
  • Identify why an AND gate produces logical conjunction and when to use it instead of OR.
  • Recognise that AND with N inputs has only one row in its truth table that produces 1 — the all-1s row.
  • Spot AND gates inside larger circuits like keycard readers, vault locks, and interlock systems.

仕組み

The circuit has three input switches — Keycard, PIN, and Manager Override — feeding a single 3-input AND gate. The gate's output drives an output light labelled "Vault Unlock". Because AND only returns 1 when every input is 1, the light is dark for any combination where one or more conditions are missing.

Internally, an AND gate implements logical conjunction. With three inputs A, B, and C, the function is Y = A · B · C, which is 1 only on the row of the truth table where all three inputs are 1. There are 2³ = 8 possible input combinations and exactly one of them — (1,1,1) — turns the output on.

This is the digital equivalent of an "all of the above" rule. Replace the AND with an OR and the meaning flips: any one switch alone would unlock the vault. Replace it with a NAND and you get an alarm that fires unless every credential is presented. The same three switches drive completely different security policies depending on which gate sits in the middle — which is the central insight combinational logic gives you.

Notice that input order does not matter. AND is commutative and associative, so Keycard·PIN·Override produces the same output as Override·PIN·Keycard, and a 3-input AND can be built equivalently from two 2-input ANDs chained together.

真理値表

A 3-input AND has 2³ = 8 input combinations. The output is high (Vault Unlock = 1) on exactly one row — when all three credentials are presented simultaneously.

入力 出力
KeycardPINOverride Vault Unlock
000 0 No credentials — locked
001 0
010 0
011 0 PIN + override, no keycard
100 0
101 0
110 0 Keycard + PIN, no override
111 1 All three — vault unlocks

ブール式

Y=ABCY = A \cdot B \cdot C

Standard form. Each variable represents one credential check; the product is 1 only when every variable is 1.

Y=ABCY = A \land B \land C

Same expression in formal logic notation using the conjunction symbol.

Y=A+B+CY = \overline{\overline{A} + \overline{B} + \overline{C}}

De Morgan equivalent — useful if you only have NOR gates. The AND of inputs equals the NOR of their inverses.

順を追って試す

上の埋め込み回路で入力を設定し、期待される結果と一致するか確認しましょう。

  1. 1
    Keycard = 0 PIN = 0 Override = 0
    期待値: Vault Unlock = 0
    観察ポイント: All switches off — the output light is dark. This is the resting state of any AND-gated lock.
  2. 2
    Keycard = 1 PIN = 1 Override = 0
    期待値: Vault Unlock = 0
    観察ポイント: Two of three credentials are presented but the override is missing — the AND output is still 0. This shows why AND enforces "all", not "most".
  3. 3
    Keycard = 1 PIN = 1 Override = 1
    期待値: Vault Unlock = 1
    観察ポイント: All three switches on — the output light turns on. This is the only one of eight possible combinations that unlocks the vault.
  4. 4
    Keycard = 0 PIN = 1 Override = 1
    期待値: Vault Unlock = 0
    観察ポイント: Flip just the keycard off and the output drops to 0. Removing any single high input is enough to disable the AND output — a useful safety property.

使用コンポーネント

実世界での応用

Building access control. Office vaults, server rooms, and bank safes commonly require two or three independent checks — a swiped card, a typed PIN, and an override key — combined through an AND gate so the door only opens when every check is satisfied.

Industrial interlocks. Heavy machinery starts only when guards are closed, an emergency stop is released, and the operator presses a two-hand-control button. AND gates in the safety circuit make sure no single mistake can start the machine.

Microcontroller chip-select logic. When a CPU addresses a peripheral, multiple address-decoder lines must be high simultaneously to enable the correct chip. The chip-enable line is driven by an AND of those decoded address bits.

Two-factor authentication, conceptually. Software 2FA is the same idea generalised: "you have your phone" AND "you know your password" AND "you are at this location". Each factor is an input; the AND combines them into a single allow/deny.

Read-write enables in memory. A RAM cell only writes when the chip-select line, the write-enable line, and the row-strobe are all high — three ANDed conditions guarding a single store operation.

よくある質問

Why use AND instead of OR for a security circuit?
AND requires every input to be 1 for the output to be 1, which matches the security policy "all checks must pass." OR would unlock the vault if even one credential were presented, which defeats the purpose of multi-factor authentication.
Can I build a 3-input AND from 2-input ANDs?
Yes. Chain two 2-input ANDs: feed A and B into the first, then feed that output and C into the second. The result is identical to a single 3-input AND because AND is associative.
What if I want the vault to alarm when credentials are missing?
Replace the AND with a NAND (NOT-AND). NAND outputs 0 only when all inputs are 1, so it's high any time at least one credential is missing — perfect for driving an alarm light or buzzer.
How many transistors does this circuit need?
A standard CMOS 3-input AND gate uses 8 transistors (a 3-input NAND followed by an inverter). Inside the simulator the gate is treated as a single primitive, but on real silicon it expands to that transistor network.
Is the order of the input switches important?
No. AND is commutative — swapping the inputs does not change the output. From the gate’s perspective Keycard·PIN·Override is identical to Override·Keycard·PIN.
What is the propagation delay of this circuit?
In hardware, a 3-input AND has a single gate delay (roughly 1–2 ns in modern CMOS). The simulator runs synchronously and shows the output update instantly when you toggle a switch.

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