Multi-Input Logic Gates: From 3-Input AND to Beyond
TL;DR: A wide AND/OR/XOR gate can be built two ways: cascaded (linear delay, ) or as a balanced tree (logarithmic delay, ). Both use the same number of gates —...
A collection of 6 posts
TL;DR: A wide AND/OR/XOR gate can be built two ways: cascaded (linear delay, ) or as a balanced tree (logarithmic delay, ). Both use the same number of gates —...
TL;DR: An AND gate outputs 1 only when every input is 1; otherwise the output is 0. Boolean expression . Despite the simple logic, real AND gates have non-zero propagation...
TL;DR: The NOT gate (inverter) takes a single input and outputs its logical complement: . It is the third member of the AND/OR/NOT functionally complete set. Beyond simple inversion, NOT...
TL;DR: An OR gate produces a HIGH output when any one (or more) of its inputs is HIGH. Boolean expression . Where the AND gate demands unanimous consent, OR follows...
TL;DR: The XNOR gate (Exclusive-NOR) outputs 1 only when its inputs are equal — both 0 or both 1. Boolean expression . Multi-input XNOR chains act as even-parity detectors, and...
TL;DR: A truth table lists every possible input combination and the deterministic output a logic gate produces. This reference covers all seven standard gates — AND, OR, NOT, NAND, NOR,...